The invention relates to a circuit for synchronously converting parallel data transferred by one or more parallel data channels into corresponding serial data streams having respectively programmable frequency ratios of the serial output data bits.
Prior art parallel-to-serial converters are known to utilize relatively complex circuitry to obtain synchronization. Besides, the prior art converters are inflexible when the number of the parallel input bits is to be changed and it is often necessary to redesign these circuits to accommodate such change.